Due to its high overwriting concept, flash memories play a critical role in the VLSI sector for data storage. However, because of the parasitic capacitance that exists between the storage cells, errors in decoding the memory circuits occur. Many error control coding techniques have been created in information coding to repair errors, such as RS decoding, BCH decoding, and LDPC decoding, which are all utilised as error control coding in NAND flash storage. Controlling different voltage levels shows the difference between soft and hard decisions in error control strategies. The best result on various output leads is obtained by fragmenting NAND Flash into pages with a threshold and applying various techniques such as paired pages and parallel pipelined techniques. In this survey, we analyse the results of diverse approaches, strategies, tools, and techniques employed to decode NAND flash memories with various error control encodings.